Job description
Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our
Vision, Mission, and 11 Guiding Values
; we affectionately refer to it as the
Aggregate System and it’s won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over
30 years of quarterly profitability
without a great team dedicated to empowering innovation. People like you.
Visit our
careers
page to see what exciting opportunities and company
perks
await!
Job Description:
The Microchip FPGA Software Engineering team delivers a comprehensive software suite for designing Microchip’s FPGAs and managing the entire design flow from entry, to synthesis, through place-and-route, timing, power analysis, and simulation. Within the Software organization, the Physical and Logical Design group is responsible for developing high-performance place, route, and synthesis software. Our placement and routing tools are distributed commercially to a wide range of customers and are used internally for the exploration of new FPGA architectures.
We research and implement sophisticated approaches for solving gigantic problems - like finding high-quality placements for millions of movable modules, or routing circuits whose graph representations contain hundreds of millions of edges. To do this, we draw from a variety of computer science domains, including: numerical optimization, linear programming, Boolean satisfiability, stochastic search, graph theory, traffic routing, and computational geometry.
We have a position in the Physical and Logical Design group. As a key member of this R&D team, you will leverage your solid foundation in computer science to develop new placement, routing, and/or synthesis algorithms. You will be an important contributor to our team and to our company - your work will become a vital component of our flow, and your discoveries will enrich the state of cutting-edge CAD research.
Responsibilities:
We research and implement sophisticated approaches for solving gigantic problems - like finding high-quality placements for millions of movable modules, or routing circuits whose graph representations contain hundreds of millions of edges. To do this, we draw from a variety of computer science domains, including: numerical optimization, linear programming, Boolean satisfiability, stochastic search, graph theory, traffic routing, and computational geometry.
We have a position in the Physical and Logical Design group. As a key member of this R&D team, you will leverage your solid foundation in computer science to develop new placement, routing, and/or synthesis algorithms. You will be an important contributor to our team and to our company - your work will become a vital component of our flow, and your discoveries will enrich the state of cutting-edge CAD research.
Responsibilities:
-
Develop state-of-the-art FPGA CAD algorithms to improve circuit performance, power, and tool runtime
-
Execute methodical, scientific experiments to validate the extent of algorithmic improvements
-
Perform design reviews, unit testing, and code reviews
-
Own and maintain code modules
-
Study literature in the CAD industry and contribute to research discussions
Requirements/Qualifications:
Minimum Qualifications:
-
BS, MS or PhD in CS/EE or related field
-
12.5+ years (5+ with MS or 2+ with PhD) of Software Engineering experience preferably working with FPGA’s
-
Strong knowledge and ability in C++, as well as a deep understanding of algorithms and data structures
Preferred Qualifications:
-
Exposure to placement, routing, and/or synthesis algorithms for FPGAs or ASICs
-
Familiarity with artificial intelligence, linear and non-linear optimization, compiler theory
-
Exposure to parallel programming techniques, like TBB
-
Experience with source code management systems (ClearCase, Git, SVN, Perforce)
-
Experience with shell scripting languages (Perl, Python, Bash, TCL)
-
Comfortable with large-scale software development in a Linux environment
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Handling, Hearing, Other, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
M-F 8am to 5pm; 90% sitting, 10% standing
Pay Range:
The expected base salary range for this position, if filled in California, is $75,000 - $232,000, dependent on specific skills and work experience. We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below.
Benefits of working at Microchip
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the
For more information on applicable equal employment regulations, please refer to the
EEO is the Law Poster
and the
EEO is the Law Poster Supplement
. Please also refer to the
Pay Transparency Policy Statement
.
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