Job description
What to Expect
What You’ll Do
What You’ll Bring
Tesla's Dojo Silicon Development Team is looking for a brilliant senior level or staff level SOC design verification engineer to develop and manage the verification and test environments. We are looking for motivated Engineers work on state-of-the-art chip designs, where your limit is only your imagination. You will work with a team of highly talented engineers, who are focused on advancing Tesla’s AI mission. If you love solving challenging problems, you will fit in very well with our culture.
What You’ll Do
- Define and review verification and validation testplans at the unit, IP, integration, and SOC fullchip levels.
- Review and aid in developing the RTL design architecture and specification.
- Verify design functionality through writing reusable and scalable testbenches, scoreboards, assertions, and assembly tests.
- Execute coverage of various use cases, then feeding back to the testplans for closure.
- Integrate controller IPs into the SOC testbenches, then perform fullchip/cluster/integration level testing.
- Integrate and work with VIPs to stress-test our IPs for various protocols.
- Develop and maintain regressions, tools, infrastructure, and methodology.
- Functional bringup and debug on various platforms and tools.
- Run real world software use cases on emulation and FPGA. Measure performance and feedback to designers.
- Post-silicon validation bringup and production ramp.
- BS or MS in computer science, computer engineering, or electrical engineering, or equivalent excellent experience
- 5+ years of work experience in designing, verifying, and validating complex hardware systems.
- Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, and Python.
- Proficient in debugging SOC, CPU, GPU, fabric, NOC, memory, various protocols like PCIE or Ethernet, or other complex ASIC designs.
- Knowledge of advanced computer architecture and system architecture concepts.
- Experience with writing directed and random test cases.
- Experience with design verification and validation methodologies and strategies.
- Experience with power and performance modeling concepts.
- Good communication skills, and a team player.
- Able to work independently in a fast-paced team and environment.
Preferred Experience:
- Deep knowledge of system architecture including CPU, GPU, fabrics, interconnects, NOC, memory sub-systems, I/O peripherals (UART/SPI), bus protocols (AXI/APB), PCIE, Ethernet, DMA, CSRs, SerDes, PHY, etc.
- Experience with system coherency verification.
- Experience with boot, reset, clock, and power management verification.
- Experience with GLS, Xprop, LEC, connectivity, sensors, Efuses, OTP.
- Experience with integrating controller IPs into the SOC. Prior work experience with vendors
- Emulation/FPGA experience
- Post-silicon bringup and validation experience
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