Engineer I-Yield Enhancement

Full Time
San Jose, CA 95134
Posted
Job description
Are you looking for a unique opportunity to be a part of something great? Want to join a 20,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology, Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our
Vision, Mission, and 11 Guiding Values
; we affectionately refer to it as the Aggregate System and it’s won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over
30 years of quarterly profitability
without a great team dedicated to empowering innovation. People like you.
Visit our
careers
page to see what exciting opportunities and company
perks
await!
Job Description:
MCHP Yield Enhancement Team is looking for an addition to our San Jose team! The main responsibilities will include - but are not limited to - the following:
  • Monitor the probe yield trends as well as Etest/WAT test results on the regular basis. Define and drive yield enhancement/improvement projects.
  • Using Yield Analysis Model Yp/DD concept to analyze production line yields and monitor if any defect-induced excursion events occurred.
  • Collaborating effectively with internal teams about design & product/test specs and identify technology marginalities while mitigating CIP solutions at production stage.
  • Working with foundry engineers to identify/eliminate defect source; designing and executing DOE experiments; interpreting and extracting data results and implement solutions.
  • Performing FA tasks in the engineering lab when production low yields occur to identify root causes in a timely manner.
Requirements/Qualifications:
  • BSEE with 0-3 years of experience.
  • Basic CMOS semiconductor process/device knowledge w/ certain degree of NVM/FPGA/ASIC basic product knowledge preferred.
  • Strong data analytical skill with a) deep understanding of Applied Statistics and Probability and b) basic knowledge about Semiconductor Yield Analysis Model.
  • Strong Yield Enhancement logical skills and passion to filter out yield problems, performing basic FA, then propose solutions. Semiconductor corporate process/product/testing or even QC Intern experience much appreciated.
  • Knowledge & able to do some coding on Visual Basic, Perl, Python, JMP to analyze data from raw datalog and create report. Familiar with Object Oriented Programing concept (such as class inheritance, virtual function, data encapsulation) a big plus.
  • Team player and facilitator. Works collaboratively with other internal/external teams and role models collaboration.
ITAR STATEMENT: This job requires access to technology, materials, software or hardware that is controlled by the export laws of the United States. Candidates are required to provide proof of either US citizenship, Permanent US residency or classification as a protected individual as defined in 8 USC 1324b (a) (3).
Travel Time:
0% - 25%
Physical Attributes:
Feeling, Hearing, Seeing, Talking, Works Alone, Works Around Others
Physical Requirements:
80% sitting, 10% standing, 10% walking, 100% inside
Pay Range:
The expected base salary range for this position, if filled in California, is $64,480 - $128,000, dependent on specific skills and work experience. We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. Find more information about all our benefits at the link below.
Benefits of working at Microchip
Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the
EEO is the Law Poster
and the
EEO is the Law Poster Supplement
. Please also refer to the
Pay Transparency Policy Statement
.

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