Job Description

The Custom Structured ASIC Engineering Group within Intel Programmable Solutions Group is seeking a versatile and talented candidate to be part of Intel's next generation Custom Structured ASIC Development Team.

Who you are:

In this position you will be responsible for leading the Verification efforts of the DFX Features on our Structured ASIC Platforms. This role requires in depth knowledge in one or more areas such as: SOC Verification Strategies, Memory BIST, SCAN, Debug, and Boundary Scan. The candidate is expected to define the Verification Plan and develop tests for the Full Chip DFX features verifying the Debug and Testing capabilities of the platform.

Areas of responsibility for this role include, but not limited to the following:

• Define the Verification Plan and review the planned tests with the Design Engineering Team to make sure all use cases are covered
• Architect the DFX Environment making sure all agents and drivers are implemented and reusable for future similar devices
• Work with Manufacturing and DFT Teams to create testcases targeting the Debug and Test capabilities of the platform
• Develop a regression system to support automated running of all implemented tests
• Work with the HW Emulation Team to identify additional areas of coverage which are difficult to achieve through standard UVM methodologies
• Improve the verification methodology by moving time consuming tests into the Emulation Platform reducing the overall regression runtime
• Validate end-to-end scenarios for DFT starting from the Platform Initialization to running the Test procedures and collecting the results
• Define test scenarios for DFT Configuration and review with the ATPG Team that all modes can be enabled and used as expected

A successful candidate will demonstrate:

• Good problem-solving, communication skills, and debugging capabilities
• Highly motivated self-starter, willing to work in a collaborative environment with cross-organizational teams as well as independently
• Good communication skills and teamwork

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Qualifications

Minimum Education Requirement:

Bachelor's Degree in Computer Engineering, Computer Science, or related field plus 6 years of industry work experience or

Master's Degree in Computer Engineering, Computer Science, or related field plus 4 years of industry work experience

Minimum Required Qualifications:

6 years of experience in Design and Verification

5 years of experience in System Verilog, UVM, and VMM Based Verification Environments

5 years of experience with DFX Strategies, ATPG, or Memory BIST Architectures

Additional Preferred Qualifications:

Advanced knowledge of Chip Design and Verification Flow

Knowledge of one or more scripting languages like Python, TCL or PERL

Experience with Debug Interfaces (mainly JTAG and/or I2C) is considered a big plus

Inside this Business Group

The Data Center & Artificial Intelligence Group (DCAI) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Other Locations

US,OR,Hillsboro;US,AZ,Phoenix;US,CA,Folsom

Covid Statement

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

Annual Salary Range for jobs which could be performed in US, California: $139,480.00-$209,760.00

• Salary range dependent on a number of factors including location and experience

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

JobType

Hybrid