Job description

Lead Analog RF Layout Engineer

Santa Clara CA

Who We Are

About Capgemini Engineering

World leader in engineering and R&D services, Capgemini Engineering combines its broad industry knowledge and cutting-edge technologies in digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of the rest of the Group, it helps clients to accelerate their journey towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries across sectors including Aeronautics, Space, Defense, Naval, Automotive, Rail, Infrastructure & Transportation, Energy, Utilities & Chemicals, Life Sciences, Communications, Semiconductor & Electronics, Industrial & Consumer, Software & Internet.

Capgemini Engineering is an integral part of the Capgemini Group, a global leader in partnering with companies to transform and manage their business by harnessing the power of technology. The Group is guided every day by its purpose of unleashing human energy through technology for an inclusive and sustainable future. It is a responsible and diverse organization of over 340,000 team members in more than 50 countries. With its strong 55-year heritage and deep industry expertise, Capgemini is trusted by its clients to address the entire breadth of their business needs, from strategy and design to operations, fueled by the fast evolving and innovative world of cloud, data, AI, connectivity, software, digital engineering and platforms. The Group reported in 2021 global revenues of €18 billion.

Get the Future You Want | www.capgemini.com

Capgemini discloses salary range information in compliance with state and local pay transparency obligations. The disclosed range represents the lowest to highest salary we, in good faith, believe we would pay for this role at the time of this posting, although we may ultimately pay more or less than the disclosed range, and the range may be modified in the future. The disclosed range takes into account the wide range of factors that are considered in making compensation decisions including, but not limited to, geographic location, relevant education, qualifications, certifications, experience, skills, seniority, performance, sales or revenue-based metrics, and business or organizational needs. At Capgemini, it is not typical for an individual to be hired at or near the top of the range for their role. The base salary range for the tagged location is [$97,700 to $170,000].

This role may be eligible for other compensation including variable compensation, bonus, or commission. Full time regular employees are eligible for paid time off, medical/dental/vision insurance, 401(k), and any other benefits to eligible employees.

Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, or any other form of compensation that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company’s sole discretion, consistent with the law.

What you’ll do:

· Lead layout team in completing complex layout for analog/mixed-signal circuits in deep submicron CMOS technologies

· Be a great role model, by inspiring and motivating team, and Establishing Effective Organizational Structure and Communication Protocols. Able to Delegate and Empower team along with Effective Time Management.

· Working with the circuit designer or Layout-Lead to plan/schedule work and negotiate any layout trade-offs as needed

· Reviewing and analyzing floorplans and complex circuits with circuit designers

· Running complete set of design verification tools available on AMS blocks

· Interpreting LVS, DRC and ERC reports to find the fastest way to complete layout

· Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that meet stringent matching performance, area, and power requirements

What you’ll have:

· 10+ years of experience in analog/mixed-signal layout design of deep submicron CMOS circuits and at least 3+ years of recent experience on advance nodes including FinFET technologies

· Experience with and knowledge of analog/mixed-signal IP (e.g., SERDES PHY, transmitter and receiver, PLL, DDR PHY, ADCs, DACs, LDOs, etc.)

· Experience leading complex layout macros during the full design cycle from floorplan analysis to completion of physical design verification

· Great understanding of CAD flows and tools related to analog/mixed-signal layout design

· Experience crafting well-matched, low noise, and low power analog blocks consisting of transistors, resistors, capacitors, pad IO's, ESD structures, etc.

· High level of proficiency in custom, as well as standard cell-based, floorplanning and hierarchical layout assembly

· Must understand issues of IR drop, RC delay, electro-migration, self-heating and coupling capacitance

· Must recognize failure prone circuit and layout structures, have experience with analog and DFM standard methodologies, and enthusiastically work with circuit designer or layout lead for the best approach to problems

· High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc., reports

· Knowledge of CADENCE or MENTOR GRAPHICS layout tools.

· Excellent interpersonal skills and able to work with remote teams

Capgemini is an Equal Opportunity Employer encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status, or any other characteristic protected by law.

This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory, or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodations do not pose an undue hardship.

Click the following link for more information on your rights as an Applicant

http://www.capgemini.com/resources/equal-employment-opportunity-is-the-law

Job Type: Full-time

Salary: $150,000.00 - $170,000.00 per year

Benefits:

• 401(k)
• 401(k) matching
• Dental insurance
• Employee assistance program
• Employee discount
• Flexible schedule
• Flexible spending account
• Health insurance
• Health savings account
• Life insurance
• Paid time off
• Parental leave
• Professional development assistance
• Referral program
• Relocation assistance
• Retirement plan
• Tuition reimbursement
• Vision insurance

Schedule:

• 8 hour shift

Work Location: One location

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